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? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 ? self-oscillated, high-voltage gate driver may 2008 fan7387 rev. 1.0.0 fan7387 self-oscillated, high -voltage gate driver features ? internal clock using rct ? external sync function using rct ? dead time control using resistor ? shut down (disable mode) ? internal shunt regulator ? uvlo function, high and low side applications ? half-bridge inverter ? smps ? ballast solution for high-intensity discharge (hid) lamp ? ballast for fluorescent lamp description the fan7387 is a simple control ic for common half- bridge inverters, smps, and ballast for fluorescent and hid lamps. the fan7387 has an oscillating circuit using an external resistor and capacitor. the frequency variation is very stable across a wide temperature range. the fan7387 has a external pin for dead time control and shutdown. using this resistor, the designer can choose the optimum dead time to reduce power loss on switching devices, such as transistors and mosfets. ordering information all standard fairchild semiconductor pr oducts are rohs compliant and many are also ?green? or going green. for fairchild?s definition of ?green? please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. note: 1. these devices passed wave soldering test by jesd22a-111. 8-dip 8-sop part number package operating temperature range packing method fan7387m (1) 8-sop -40c ~ 125c tube FAN7387MX (1) tape & reel fan7387n 8-dip tube
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 rev. 1.0.0 2 typical application diagrams figure 1. typical application circuit for smps (self oscillation method) figure 2. typical application circuit for smps using external signal vdd rdt ct rt2 d1 r1 r2 m1 m2 c3 c4 d2 vdd rct vb ho vs lo gnd 8 7 6 5 1 2 3 4 fan7387 dt/ sd gnd c1 c2 vdc d3 c5 c6 shutdown q1 rt1 frequency control q2 fan7387 rev1.0 cb* * note: this capacitor, cb, is for system stab ility and must use at least 470nf. vdd q2 rdt d1 r3 r4 m1 m2 c3 c4 d2 vdd rct vb ho vs lo gnd 8 7 6 5 1 2 3 4 fan7387 dt/ sd gnd c1 c2 vdc d3 c5 c6 pwm shutdown q1 r2 r1 fan7387 rev.1.0 * note: this capacitor, cb, is for system stability and must use at least 470nf. cb*
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 rev. 1.0.0 3 figure 3. typical application circuit for full-bridge converter figure 4. typical application circuit for fluorescent lamp ballast rt d1 r3 r4 m1 m2 c3 l vdd rct vb ho vs lo gnd 8 7 6 5 1 2 3 4 fan7387 dt/ sd c1 c2 vdc d4 r5 r6 m1 m2 c5 vdd rct vb ho vs lo gnd 8 7 6 4 1 2 3 5 fan7387 dt/ sd vdd q1 rdt1 ct gnd shutdown1 q2 rdt2 gnd shutdown2 r1 r2 gnd c4 hid lamp fan7387 rev.1.0 * note: this capacitor, cb, is for system stability and must use at least 470nf. cb* cb* lamp r1 c2 q1 rdt ct rt1 d5 r4 r5 m1 m2 c4 d7 d6 c5 d1 d2 d3 d4 c1 lc6 c7 ac input vdd rct vb ho vs lo gnd 8 7 6 5 1 2 3 4 fan7387 dt/ sd r2 r3 rt2 q2 c3 over-voltage protection r6 r7 c8 zd1 fan7387 rev1.0 * note: this capacitor, cb, is for system stability and must use at least 470nf. cb*
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 rev. 1.0.0 4 internal block diagram figure 5. functional block diagram rct dt/sd vdd gnd lo vs ho vb v dd /4 q s r q dq clk/sync determination in dt shutdown low-side first logic 15v shunt uvlo hin lin v dd logic detection level external sync hin lin always lin first 8 6 7 5 1 3 2 4 delay low-side gate driver noise canceller s r q q uvlo vb set reset high-side driver short-pulse generator dead-time generation internal clk (frequency divider)
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 rev. 1.0.0 5 pin configuration figure 6. pin configuration (top view) pin definitions pin # name description 1 rct oscillator frequency set resistor and capacitor 2 vdd supply voltage 3dt/sd dead-time control and shutdown (active low) 4 gnd signal ground 5 lo low-side output 6 vs high-side floating supply return 7 ho high-side output 8 vb high-side floating supply vdd rct dt/sd vb ho vs lo gnd 8 fan7387 5 6 7 1 2 3 4 yww ( yww : work week code)
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 rev. 1.0.0 6 absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be opera- ble above the recommended operating conditions and stressing the parts to these levels is not recommended. in addi- tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. t a =25c unless otherwise specified. note: 2. do not supply a low-impedance voltage source to the internal clamping zener diode between the gnd and the v dd pin of this device. recommended operating ratings the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings symbol parameter min. typ. max. unit v b high-side floating supply voltage -0.3 625.0 v v s high-side offset voltage -0.3 600.0 v v rct rct pins input voltage v cl v i cl clamping current level (2) 25 ma dv s /dt allowable offset voltage slew rate 50 v/ns t a operating temperature range -40 +125 c t stg storage temperature range -65 +150 c p d power dissipation 8-dip 1.2 w 8-sop 0.625 ja thermal resistance (junction-to-air) 8-dip 100 c/w 8-sop 200 symbol parameter min. max. unit v b high-side floating supply voltage v s +11 v s +14 v v s high-side offset voltage 6-v dd 600 v v dd low-side supply voltage 11 14 v v ho high-side (ho) output voltage gnd v dd v v lo low-side (lo) output voltage gnd v dd v v ih logic ?1? input voltage of rct (3/4 v dd )+1 v v il logic ?0? input voltage of rct (3/5 v dd )-1 v rt timing resistor value of rct 2 k ct timing capacitor value of rct 100 pf t a ambient temperature -40 +125 c
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 rev. 1.0.0 7 electrical characteristics v bias (v dd , v b -v s )=14.0v, c l =1nf, r t =50k and c t =330pf and t a =25 c, unless otherwise specified. note: 3. these parameters, although guaranteed, is not 100% tested in production. continued on the following page... symbol parameter conditions min. typ. max. unit low-side supply characteristics (v dd ) vdd uv+ v dd supply under-voltage positive going threshold v dd increasing 9.5 11.0 12.5 v vdd uv- v dd supply under-voltage negative going threshold v dd decreasing 7.5 9.0 10.5 v vdd uvh v dd supply under-voltage lockout hysteresis 2 v v cl supply clamping voltage i dd =10ma 14.8 15.4 v i qdd low-side quiescent supply current r dt =100k 220 500 a i st start-up supply current v dd =9v 50 130 a i lk offset supply leakage current v b =v s =600v 10 a i pdd low-side dynamic operating supply current 0.8 ma high-side supply characteristics (v b -v s ) vbs uv+ v bs supply under-voltage negative going threshold v b -v s increasing 7.7 9.2 10.7 v vbs uv- v bs supply under-voltage negative going threshold v b -v s decreasing 7.1 8.6 10.1 v vbs uvh v bs supply under-voltage lockout hysteresis 0.6 v i qbs high-side quiescent supply current 50 130 a i pbs high-side dynamic operating supply current 400 800 a oscillator characteristics f osc1 oscillation frequency 1 r t =50k, c t =330pf182022 khz f osc2 oscillation frequency 2 r t =1k, c t =1nf 210 250 290 d duty cycle running mode 47.5 49.0 % v rct+ upper threshold voltage of rct running mode v dd v v rct- lower threshold voltage of rct running mode v dd /4 v v ih logic ?1? input voltage of rct running mode 3/4v dd v v il logic ?0? input voltage of rct running mode 3/5v dd v dt dead time r dt =100k 500 600 700 ns dt min minimum dead time v dt/sd =v dd 300 400 500 output characteristics i o+ (3) output high, short-circuit pulse current pw<=10s 350 ma i o- (3) output low, short-circuit pulse current pw=10s 650 ma v s allowable negative v s pin voltage for input signal (v rct ) propagation to ho -9.8 -7.0 v
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 rev. 1.0.0 8 electrical characteristics (continued) v bias (v dd , v b -v s )=14.0v, c l =1nf, r t =50k and c t =330pf and t a =25 c, unless otherwise specified. symbol parameter condition min. typ. max. unit output characteristics t on turn-on propagation time v dd =v bs =14v, v dt/sd =v dd , v rct =4v~v dd , f osc =20khz 550 ns t off turn-off propagation time v dd =v bs =14v, v dt/sd =v dd , v rct =4v~v dd , f osc =20khz 160 ns t r turn on rising time c l =1000pf 50 120 ns t f turn off falling time c l =1000pf 30 70 ns protection characteristics sd+ shutdown ?1? input voltage 2.7 v sd+ shutdown ?0? input voltage 1 v i sd shutdown current v sd/dt =0 after running mode 250 a t sd shutdown propagation delay 180 ns
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 rev. 1.0.0 9 switching definitions figure 7. test circuit for self-oscillation method figure 8. basic operating waveforms of self-oscillation figure 9. shutdown delay definition figure 10. test circuit for forced-oscillation method using external signal figure 11. basic operation waveforms of forced-oscillation method using external signal vdd rct vb ho vs lo gnd 8 fan7387 5 6 7 1 2 3 4 dt/sd rdt 10f 0.1f 1000pf 1000pf +14v 10f 100nf ct rt 470nf fan7387 ver1.0 rct ho lo dt ho or lo 90% 50% t sd dt/sd vdd rct vb ho vs lo gnd 8 fan7387 5 6 7 1 2 3 4 dt/sd pwm+dc offset rdt 10f 0.1f 1000pf 1000pf +14v +14v 0.1f 10f 470nf rct 50% 50% ho t on t r t f 90% 90% 10% 10% t off 50% 50% dt 50% lo 50% 90% t sd dt/ sd
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 rev. 1.0.0 10 typical characteristics figure 12. start-up current vs. temp. figure 13. v dd uvlo+ vs. temp. figure 14. v dd uvlo- vs. temp. figure 15. v bs uvlo+ vs. temp. figure 16. v bs uvlo- vs. temp. figure 17. v cl vs. temp. -40 -20 0 20 40 60 80 100 120 0 50 100 150 200 ist [ua] temperature [c] -40-20 0 20406080100120 9.5 10.0 10.5 11.0 11.5 12.0 12.5 vdduv+ [v] temperature [c] -40-20 0 20406080100120 7.5 8.0 8.5 9.0 9.5 10.0 10.5 vdduv- [v] temperature [c] -40-20 0 20406080100120 7.2 7.6 8.0 8.4 8.8 9.2 9.6 10.0 vbsuv+ [v] temperature [c] -40-20 0 20406080100120 7.2 7.6 8.0 8.4 8.8 9.2 9.6 10.0 vbsuv- [v] temperature [c] -40-20 0 20406080100120 14.8 15.0 15.2 15.4 15.6 15.8 16.0 vcl [v] temperature [c]
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 rev. 1.0.0 11 typical characteristics (continued) figure 18. i pdd vs. temp. figure 19. i qdd vs. temp. figure 20. i sd vs. temp. figure 21. v sd + vs. temp. figure 22. v sd - vs. temp. figure 23. operating frequency 1 vs. temp. -40 -20 0 20 40 60 80 100 120 0.0 0.5 1.0 1.5 2.0 2.5 ipdd [ma] temperature [c] -40-20 0 20406080100120 0 100 200 300 400 500 iqdd [ua] temperature [c] -40-20 0 20406080100120 0 100 200 300 400 500 isd [ua] temperature [c] -40-20 0 20406080100120 0.0 0.5 1.0 1.5 2.0 2.5 3.0 vsd+ [v] temperature [c] -40-20 0 20406080100120 1.0 1.5 2.0 2.5 3.0 vsd- [v] temperature [c] -40 -20 0 20 40 60 80 100 120 17 18 19 20 21 22 23 frequency 1 [khz] temperature [c]
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 rev. 1.0.0 12 typical characteristics (continued) figure 24. operating frequency 2 vs. temp. figure 25. minimum dt vs. temp. figure 26. dead time mismatch vs. temp. figure 27. high-side duty ratio vs. temp. figure 28. frequency vs. rt figure 29. low-side duty ratio vs. temp -40-20 0 20406080100120 210 220 230 240 250 260 270 280 frequency 2 [khz] temperature [c] -40-20 0 20406080100120 300 325 350 375 400 425 450 475 500 dtmin [ns] temperature [c] -40-20 0 20406080100120 0 10 20 30 40 50 mismatch at dtmin [ns] temperature [c] -40 -20 0 20 40 60 80 100 120 48 49 50 51 52 duty at high side [%] temperature [c] -40 -20 0 20 40 60 80 100 120 48 49 50 51 52 duty at low side [%] temperature [c]
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 rev. 1.0.0 13 typical application informations 1. uvlo (under-voltage lockout) function fan7387 has a uvlo circuit for a low-side and high- side block. when v dd reaches to the v dduv +, the uvlo circuit is released and the fan7387 operates normally. at uvlo condition, the fan7387 has a low supply current of less than 130a. once uvlo is released, fan7387 operates normally until v dd goes below v dduv -, the uvlo hysteresis. fan7387 also has a high-side gate driver. the supply for the high-side driver is applied between v b and v s . to prevent malfunction at low supply voltage between v b and v s , fan7387 provides an additional uvlo circuit. if v b -v s is under v bsuv +, the driver holds low state to turn off the high-side switch. once the voltage of v b -v s is higher than v bsuvh after v b -v s exceeds v bsuv -, the operation of driver resumes. 2. oscillator the running frequency is determined by an external timing resistor (r t ) and timing capacitor (c t ). the charge time of capacitor c t from 1/4 v dd to v dd determines the running frequency of lo and ho gate driver output. figure 30 shows connection configuration. figure 30. typical connection method figure 31 shows the typical waveforms of rct, lo, and ho. from the circuit analysis, the discharging time of rct, t, is given by equation 1: from equation 1, it is possible to calculate discharging time, t, from v dd to 1/4 v dd by substituting v rct(t) with 1/4 v dd . figure 31. typical waveforms of rct, lo, and ho the running frequency of ic is determined by 1/t and is approximately given as: where t is the discharging time of the rct voltage and and t fix is constant value about 450ns of ic. 3. programming dead time control / shutdown a multi-function pin controls dead time using an external resistor (r dt ) and protects abnormal condition using an external switch. this pin should be connected to an external capacitor to maintain stable operation. if the voltage of dt/sd is decreased under 1v by an external switch, such as the tr or mosfet, the fan7387 enters shutdown mode. in this mode, the fan7387 doesn?t have any output signal. vdd vdd rct vb vs gnd 8 fan7387 5 6 7 1 2 3 4 dt/sd ct rt fan7387 rev1.0 lo ho (1) v rct t vdd in \t rt c t rct ho lo t t dt dt t fix t fix t 1.38 rt ct (2) (3) f running 1 t 1 2t t fix
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 rev. 1.0.0 14 figure 32. external shutdown circuit 4. gate driver operation the fan7387 has a two operating modes. one is the self-oscillation mode by using external timing resistor (r t ) and external timing capacitor (c t ) and the other is the forced oscillation mode by external pwm signal comes from u-com and the other devices. figure 33 shows how to operate ic by using external pwm circuit with additional resistors (r1 and r2) because of internal limitation of ic. the input signal range from an external circuit must by within 3/5 v dd and 3/4 v dd . the external signal produce the ho and lo output and ho signal is to in-phase with the external input signal. figure 33. gate driver using external pwm signal vdd rct vb vs gnd 8 fan7387 5 6 7 1 2 3 4 dt/sd rdt rev. 1.0 +14v cbp ho lo external signal vdd vdd rct vb vs gnd 8 fan7387 5 6 7 1 2 3 4 dt/sd c rdt fan7387 rev1.0 lo ho pwm gnd r1 r2
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 rev. 1.0.0 15 package dimensions figure 34. 8-lead dual inline package (dip) package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to verify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ c 7 typ 7 typ .430 max [10.92] b a .400 .373 [ 10.15 9.46 ] .250.005 [6.350.13] .036 [0.9 typ] .070 .045 [ 1.78 1.14 ] .100 [2.54] .300 [7.62] .060 max [1.52] .310.010 [7.870.25] .130.005 [3.30.13] .210 max [5.33] .140 .125 [ 3.55 3.17 ] .015 min [0.38] .021 .015 [ 0.53 0.37 ] .010 +.005 -.000 [ 0.254 +0.127 -0.000 ] pin #1 pin #1 (.032) [r0.813] (.092) [?2.337] top view option 1 top view option 2 .001[.025] c n08erevg c. does not include mold flash or protrusions. dambar protrusions shall not exceed d. does not include dambar protrusions. b. controling dimensions are in inches a. conforms to jedec registration ms-001, mold flash or protrusions shall not exceed variations ba e. dimensioning and tolerancing notes: reference dimensions are in millimeters .010 inches or 0.25mm. .010 inches or 0.25mm. per asme y14.5m-1994.
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fan7387 rev. 1.0.0 16 package dimensions figure 35. 8-lead small outline package (sop) package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to verify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ 8 0 see detail a notes: unless otherwise specified a) this package conform s to jedec m s-012, variation aa, issue c, b) all dim ensions are in millimeters. c) dimensions do not include mold flash or burrs. d) landpattern standard: soic127p600x175-8m. e) draw ing filenam e: m08arev13 land pattern recommendation seating plane 0.10 c c gage plane x 45 detail a scale: 2:1 pin one indicator 4 8 1 c m ba 0.25 b 5 a 5.60 0.65 1.75 1.27 6.20 5.80 3.81 4.00 3.80 5.00 4.80 (0.33) 1.27 0.51 0.33 0.25 0.10 1.75 max 0.25 0.19 0.36 0.50 0.25 r0.10 r0.10 0.90 0.406 (1.04) option a - bevel edge option b - no bevel edge
fan7387 ? self-oscillated, high-voltage gate driver ? 2008 fairchild semiconductor corporation fan7387 rev. 1.0.0 17

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